The Journal of VLSI Signal Processing, Volume 43

Volume 43, Number 1, April 2006

• Won Namgoong:
  Editorial. 5
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• Honglei Zhang, Dennis Goeckel, Shuangqing Wei, Moe Z. Win:
  Rapid Hybrid Acquisition of Ultra-Wideband Signals. 7-23
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• On Wa Yeung, Keith M. Chugg:
  An Iterative Algorithm and Low Complexity Hardware Architecture for Fast Acquisition of Long PN Codes in UWB Systems. 25-42
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• Sakari Tiuraniemi, Lucian-Vasile Stoica, Alberto Rabbachin, Ian Oppermann:
  A VLSI Implementation of Low Power, Low Data Rate UWB Transceiver for Location and Tracking Applications. 43-58
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• Lei Feng, Won Namgoong:
  An Analog/Digital Baseband Processor Design of a UWB Channelized Receiver for Transmitted Reference Signals. 59-71
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• Ebrahim Saberinia, K. C. Chang, Gerald E. Sobelman, Ahmed H. Tewfik:
  Implementation of a Multi-band Pulsed-OFDM Transceiver. 73-88
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• A. O. Boryssenko, D. H. Schaubert:
  Electromagnetics-Related Aspects of Signaling and Signal Processing for UWB Short Range Radios. 89-104
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• Chao Cheng, Keshab K. Parhi:
  Hardware efficient fast computation of the discrete fourier transform. 105-106
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Volume 43, Numbers 2-3, June 2006

• Andy D. Pimentel, Stamatis Vassiliadis:
  Editorial. 111
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• Jarmo Takala, Konsta Punkka:
  Scalable FFT Processors and Pipelined Butterfly Units. 113-123
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• Michael Hosemann, Gerhard Fettweis:
  On Enhancing SIMD-controlled DSPs for Performing Recursive Filtering. 125-142
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• Michael J. Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis:
  A Low-Power Multithreaded Processor for Software Defined Radio. 143-159
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• Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis:
  Interprocedural Compiler Optimization for Partial Run-Time Reconfiguration. 161-172
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• Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere:
  Requirements for Interfacing IP-Components in Re-configurable Platforms. 173-184
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• Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna:
  HIBI Communication Network for System-on-Chip. 185-205
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• John McAllister, Roger Woods, Richard Walke, D. Reilly:
  Multidimensional DSP Core Synthesis for FPGA. 207-221
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• Holger Blume, Thorsten von Sydow, Tobias G. Noll:
  A Case Study for the Application of Deterministic and Stochastic Petri Nets in the SoC Communication Domain. 223-233
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• Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun:
  Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. 235-246
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• Jürgen Teich, Shuvra S. Bhattacharyya:
  Analysis of Dataflow Programs with Interval-limited Data-rates. 247-258
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