Tanay Karnik

2007
16	EE	Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik: Low Voltage Buffered Bandgap Reference. ISQED 2007: 93-97
2006
15	EE	Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald Gardner: High-frequency DC-DC conversion : fact or fiction. ISCAS 2006
14	EE	Hao Yu, Yiyu Shi, Lei He, Tanay Karnik: Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power. ISLPED 2006: 156-161
13	EE	Changbo Long, Sasank Reddy, Sudhakar Pamarti, Lei He, Tanay Karnik: Power-efficient pulse width modulation DC/DC converters with zero voltage switching control. ISLPED 2006: 326-329
12	EE	Ruchir Puri, Tanay Karnik, Rajiv V. Joshi: Technology Impacts on Sub-90nm CMOS Circuit Design and Design Methodologies. VLSI Design 2006: 5-7
2005
11	EE	Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang: Logic soft errors in sub-65nm technologies design and CAD challenges. DAC 2005: 2-4
10	EE	Anirudh Devgan, Ruchir Puri, Sachin Sapatnaker, Tanay Karnik, Rajiv V. Joshi: Design of sub-90nm Circuits and Design Methodologies. ISQED 2005: 3-4
2004
9	EE	Shekhar Borkar, Tanay Karnik, Vivek De: Design and reliability challenges in nanometer technologies. DAC 2004: 75
8	EE	Tsung-Hao Chen, Jeng-Liang Tsai, Tanay Karnik: HiSIM: hierarchical interconnect-centric circuit simulator. ICCAD 2004: 489-496
7	EE	Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald Gardner, Siva Narendra, Tanay Karnik, Vivek De: Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268
6	EE	Tanay Karnik, Peter Hazucha, Jagdish Patel: Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes. IEEE Trans. Dependable Sec. Comput. 1(2): 128-143 (2004)
2003
5	EE	Shekhar Borkar, Tanay Karnik, Siva Narendra, James Tschanz, Ali Keshavarzi, Vivek De: Parameter variations and impact on circuits and microarchitecture. DAC 2003: 338-342
2002
4	EE	Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar: Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. DAC 2002: 486-491
3	EE	Tanay Karnik, Shekhar Borkar, Vivek De: Sub-90nm technologies: challenges and opportunities for CAD. ICCAD 2002: 203-206
1995
2	EE	Tanay Karnik, Sung-Mo Kang: An empirical model for accurate estimation of routing delay in FPGAs. ICCAD 1995: 328-331
1994
1	EE	Chung-Hsing Chen, Tanay Karnik, Daniel G. Saab: Structural and behavioral synthesis for testability techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 777-785 (1994)

Coauthor Index

1	Shekhar Y. Borkar (Shekhar Borkar)	[3] [4] [5] [9]
2	Steven M. Burns	[4]
3	Chung-Hsing Chen	[1]
4	Tsung-Hao Chen	[8]
5	Vivek De	[3] [4] [5] [7] [9]
6	Anirudh Devgan	[10]
7	Donald Gardner	[7] [15]
8	Donald S. Gardner	[16]
9	Gell Gellman	[16]
10	Venkatesh Govindarajulu	[4]
11	Jae-Hong Hahn	[7]
12	Peter Hazucha	[6] [7] [15] [16]
13	Lei He	[13] [14]
14	Kenneth Ikeda	[16]
15	Rajiv V. Joshi	[10] [12]
16	Sung-Mo Kang	[2]
17	Ali Keshavarzi	[5]
18	Volkan Kursun	[7]
19	Changbo Long	[13]
20	Subhasish Mitra	[11]
21	Sung Tae Moon	[16]
22	Siva Narendra	[5] [7]
23	Fabrice Paillet	[15] [16]
24	Sudhakar Pamarti	[13]
25	Jagdish Patel	[6]
26	Ruchir Puri	[10] [12]
27	Sasank Reddy	[13]
28	David J. Rennie	[16]
29	Daniel G. Saab	[1]
30	Sachin Sapatnaker	[10]
31	Gerhard Schrom	[7] [15] [16]
32	Norbert Seifert	[11]
33	Yiyu Shi	[14]
34	Jeng-Liang Tsai	[8]
35	James Tschanz	[4] [5]
36	Liqiong Wei	[4]
37	Yibin Ye	[4]
38	Hao Yu	[14]
39	Ming Zhang	[11]

Colors in the list of coauthors