| 2007 |
|---|
| 77 | EE | Yongqiang Lu,
Xianlong Hong,
Qiang Zhou,
Yici Cai,
Jun Gu:
An efficient quadratic placement based on search space traversing technology.
Integration 40(3): 253-260 (2007) |
| 2006 |
|---|
| 76 | EE | Zhi Zhang,
Pengfei Shi,
Haoyang Che,
Yong Sun,
Jun Gu:
Formulation Schema Matching Problem for Combinatorial Optimization Problem.
IBIS 1(1): 33-60 (2006) |
| 75 | EE | Jingyu Xu,
Xianlong Hong,
Tong Jing,
Ling Zhang,
Jun Gu:
A coupling and crosstalk-considered timing-driven global routing algorithm for high-performance circuit design.
Integration 39(4): 457-473 (2006) |
| 74 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Chung-Kuan Cheng,
Jun Gu:
General Floorplans with L/T-Shaped Blocks Using Corner Block List.
J. Comput. Sci. Technol. 21(6): 922-926 (2006) |
| 2005 |
|---|
| 73 | EE | Haoyang Che,
Jiacai Zhang,
Shengquan Yu,
Jun Gu:
IWWS: A Reliability-Based WWW Collaborative Recommender System.
APWeb 2005: 375-380 |
| 72 | EE | Zhi Zhang,
Haoyang Che,
Pengfei Shi,
Yong Sun,
Jun Gu:
Schema Homomorphism - An Algebraic Framework for Schema Matching.
ASIAN 2005: 255-256 |
| 71 | EE | Zhi Zhang,
Haoyang Che,
Pengfei Shi,
Yong Sun,
Jun Gu:
Multi-labeled Graph Matching - An algorithm Model for Schema Matching.
ASIAN 2005: 90-103 |
| 70 | EE | Zhi Zhang,
Haoyang Che,
Pengfei Shi,
Yong Sun,
Jun Gu:
An Algebraic Framework for Schema Matching.
WAIM 2005: 694-699 |
| 69 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Song Chen,
Chung-Kuan Cheng,
Jun Gu:
Buffer planning as an Integral part of floorplanning with consideration of routing congestion.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 609-621 (2005) |
| 2004 |
|---|
| 68 | EE | Song Chen,
Xianlong Hong,
Sheqin Dong,
Yuchun Ma,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
A buffer planning algorithm with congestion optimization.
ASP-DAC 2004: 615-620 |
| 67 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Song Chen,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Buffer allocation algorithm with consideration of routing congestion.
ASP-DAC 2004: 621-623 |
| 66 | EE | Jingyu Xu,
Xianlong Hong,
Tong Jing,
Ling Zhang,
Jun Gu:
A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design.
ASP-DAC 2004: 677-682 |
| 65 | EE | Songbo Tan,
Jun Gu:
An Efficient Rules Induction Algorithm for Rough Set Classification.
Discovery Science 2004: 330-337 |
| 64 | EE | Songbo Tan,
Jun Gu:
An Efficient Learning Algorithm for Feedforward Neural Network.
IBERAMIA 2004: 767-777 |
| 63 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Stairway compaction using corner block list and its applications with rectilinear blocks.
ACM Trans. Design Autom. Electr. Syst. 9(2): 199-211 (2004) |
| 62 | EE | Tong Jing,
Xianlong Hong,
Jingyu Xu,
Haiyun Bao,
Chung-Kuan Cheng,
Jun Gu:
UTACO: a unified timing and congestion optimization algorithm for standard cell global routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 358-365 (2004) |
| 61 | EE | Xiaohai Wu,
Xianlong Hong,
Yici Cai,
Zuying Luo,
Chung-Kuan Cheng,
Jun Gu,
Wayne Wei-Ming Dai:
Area minimization of power distribution network using efficient nonlinear programming techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 1086-1094 (2004) |
| 60 | EE | Peng Zou,
Zhi Zhou,
Ying-Yu Wan,
Guo-Liang Chen,
Jun Gu:
New Meta-Heuristic for Combinatorial Optimization Problems: Intersection Based Scaling.
J. Comput. Sci. Technol. 19(6): 740-751 (2004) |
| 59 | EE | Song Chen,
Xianlong Hong,
Sheqin Dong,
Yuchun Ma,
Chung-Kuan Cheng,
Jun Gu:
Fast Evaluation of Bounded Slice-Line Grid.
J. Comput. Sci. Technol. 19(6): 973-980 (2004) |
| 58 | EE | Jun Gu,
Xiao-Dong Hu,
Xiaohua Jia,
Mu-Hong Zhang:
Routing algorithm for multicast under multi-tree model in optical networks.
Theor. Comput. Sci. 314(1-2): 293-301 (2004) |
| 2003 |
|---|
| 57 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Song Chen,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Dynamic global buffer planning optimization based on detail block locating and congestion analysis.
DAC 2003: 806-811 |
| 56 | EE | Song Chen,
Xianlong Hong,
Sheqin Dong,
Yuchun Ma,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Evaluating a bounded slice-line grid assignment in O(nlogn) time.
ISCAS (4) 2003: 708-711 |
| 55 | EE | Rui Liu,
Sheqin Dong,
Xianlong Hong,
Di Long,
Jun Gu:
Algorithms for analog VLSI 2D stack generation and block merging.
ISCAS (4) 2003: 716-719 |
| 54 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Song Chen,
Chung-Kuan Cheng,
Jun Gu:
Arbitrary convex and concave rectilinear block packing based on corner block list.
ISCAS (5) 2003: 493-496 |
| 53 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Song Chen,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
An integrated floorplanning with an efficient buffer planning algorithm.
ISPD 2003: 136-142 |
| 52 | EE | Jingyu Xu,
Xianlong Hong,
Tong Jing,
Yici Cai,
Jun Gu:
An efficient hierarchical timing-driven Steiner tree algorithm for global routing.
Integration 35(2): 69-84 (2003) |
| 51 | EE | Fengfeng Zhou,
Guoliang Chen,
Yinlong Xu,
Jun Gu:
Minimizing ADMs on WDM Directed Fiber Trees.
J. Comput. Sci. Technol. 18(6): 725-731 (2003) |
| 50 | EE | Sheqin Dong,
Xianlong Hong,
Yuliang Wu,
Jun Gu:
Deterministic VLSI Block Placement Algorithm Using Less Flexibility First Principle.
J. Comput. Sci. Technol. 18(6): 739-746 (2003) |
| 2002 |
|---|
| 49 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Stairway Compaction using Corner Block List and Its Applications with Rectilinear Blocks.
ASP-DAC 2002: 387-392 |
| 48 | EE | Jingyu Xu,
Xianlong Hong,
Tong Jing,
Yici Cai,
Jun Gu:
An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing.
ASP-DAC 2002: 473-478 |
| 47 | EE | Tong Jing,
Xianlong Hong,
Haiyun Bao,
Yici Cai,
Jingyu Xu,
Jun Gu:
A novel and efficient timing-driven global router for standard cell layout design based on critical network concept.
ISCAS (1) 2002: 165-168 |
| 46 | | Chuxiang Li,
Jianhua Lu,
Jun Gu:
Adaptively scheduled stream-shuffling and error concealment for wireless video.
VCIP 2002: 28-36 |
| 45 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Stairway Compaction using Corner Block List and Its Applications with Rectilinear Blocks.
VLSI Design 2002: 387-392 |
| 44 | EE | Jingyu Xu,
Xianlong Hong,
Tong Jing,
Yici Cai,
Jun Gu:
An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing.
VLSI Design 2002: 473-478 |
| 43 | EE | Jun Gu,
Xiao-Dong Hu,
Mu-Hong Zhang:
Algorithms for multicast connection under multi-path routing model.
Inf. Process. Lett. 84(1): 31-39 (2002) |
| 42 | | Xiaodong Gu,
Guoliang Chen,
Jun Gu,
Liusheng Huang,
Yunjae Jung:
Performance Analysis and Improvement for Some Linear On-Line Bin-Packing Algorithms.
J. Comb. Optim. 6(4): 455-471 (2002) |
| 41 | EE | Sheqin Dong,
Shuo Zhou,
Xianlong Hong,
Chung-Kuan Cheng,
Jun Gu,
Yici Cai:
An Optimum Placement Search Algorithm Based on Extended Corner Block List.
J. Comput. Sci. Technol. 17(6): 699-707 (2002) |
| 2001 |
|---|
| 40 | EE | Yuchun Ma,
Sheqin Dong,
Xianlong Hong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
VLSI floorplanning with boundary constraints based on corner block list.
ASP-DAC 2001: 509-514 |
| 39 | EE | Sheqin Dong,
Xianlong Hong,
Youliang Wu,
Yizhou Lin,
Jun Gu:
VLSI block placement using less flexibility first principles.
ASP-DAC 2001: 601-604 |
| 38 | EE | Wenting Hou,
Hong Yu,
Xianlong Hong,
Yici Cai,
Weimin Wu,
Jun Gu,
William H. Kao:
A new congestion-driven placement algorithm based on cell inflation.
ASP-DAC 2001: 605-608 |
| 37 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List.
DAC 2001: 770-775 |
| 36 | EE | Xiaohai Wu,
Xianlong Hong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu,
Wayne Wei-Ming Dai:
Area Minimization of Power Distribution Network Using Efficient Nonlinear Programming Techniques.
ICCAD 2001: 153-157 |
| 35 | EE | Shuo Zhou,
Sheqin Dong,
Chung-Kuan Cheng,
Jun Gu:
ECBL: an extended corner block list with solution space including optimum placement.
ISPD 2001: 150-155 |
| 34 | EE | Min-You Wu,
Wei Shu,
Jun Gu:
Efficient Local Search for DAG Scheduling.
IEEE Trans. Parallel Distrib. Syst. 12(6): 617-627 (2001) |
| 33 | EE | Yuchun Ma,
Xianlong Hong,
Sheqin Dong,
Yici Cai,
Chung-Kuan Cheng,
Jun Gu:
Floorplanning with abutment constraints based on corner block list.
Integration 31(1): 65-77 (2001) |
| 32 | EE | Bing Lu,
Jun Gu,
Xiao-Dong Hu,
Eugene Shragowitz:
Wire segmenting for buffer insertion based on RSTP-MSP.
Theor. Comput. Sci. 262(1): 257-267 (2001) |
| 2000 |
|---|
| 31 | | Xianlong Hong,
Gang Huang,
Yici Cai,
Jiangchun Gu,
Sheqin Dong,
Chung-Kuan Cheng,
Jun Gu:
Corner Block List: An Effective and Efficient Topological Representation of Non-Slicing Floorplan.
ICCAD 2000: 8-12 |
| 30 | EE | Yaoxue Zhang,
Wang Xiaochun,
Jun Gu:
An End-to-End QoS Control Model for Enhanced Internet.
J. Comput. Sci. Technol. 15(6): 497-508 (2000) |
| 1999 |
|---|
| 29 | EE | Jun Gu:
The Multi-SAT Algorithm.
Discrete Applied Mathematics 96-97: 111-126 (1999) |
| 1997 |
|---|
| 28 | EE | Bin Du,
Jun Gu,
Wei Wang,
Danny H. K. Tsang:
Multispace Search for Minimizing the Maximum Nodal Degree.
ICCCN 1997: 364-371 |
| 27 | EE | Min-You Wu,
Wei Shu,
Jun Gu:
Local Search for DAG Scheduling and Task Assignment.
ICPP 1997: 174- |
| 1996 |
|---|
| 26 | | Yu-Kwong Kwok,
Ishfaq Ahmad,
Jun Gu:
FAST: A Low-Complexity Algorithm for Efficient Scheduling of DAGs on Parallel Processors.
ICPP, Vol. 2 1996: 150-157 |
| 25 | EE | Rok Sosic,
Jun Gu,
Robert R. Johnson:
The Unison algorithm: fast evaluation of Boolean expressions.
ACM Trans. Design Autom. Electr. Syst. 1(4): 456-477 (1996) |
| 24 | | Ruchir Puri,
Jun Gu:
A BDD SAT Solver for Satisfiability Testing: An Industrial Case Study.
Ann. Math. Artif. Intell. 17(3-4): 315-337 (1996) |
| 23 | | Jun Gu,
Qian-Ping Gu,
Ding-Zhu Du:
Convergence Properties of Optimization Algorithms for the SAT Problem.
IEEE Trans. Computers 45(2): 209-219 (1996) |
| 1995 |
|---|
| 22 | EE | Abdel-Fattah Yousif,
Jun Gu:
Concurrent automatic test pattern generation algorithm for combinational circuits.
ICCD 1995: 286-291 |
| 21 | EE | Qian-Ping Gu,
Jun Gu:
Two Packet Routing Algorithms on a Mesh-Connected Computer.
IEEE Trans. Parallel Distrib. Syst. 6(4): 436-440 (1995) |
| 20 | EE | Jun Gu,
Ruchir Puri:
Asynchronous circuit synthesis with Boolean satisfiability.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(8): 961-973 (1995) |
| 1994 |
|---|
| 19 | EE | Ruchir Puri,
Jun Gu:
A Modular Partitioning Approach for Asynchronous Circuit Synthesis.
DAC 1994: 63-69 |
| 18 | | Ruchir Puri,
Jun Gu:
Area Efficient Synthesis of Asynchronous Interface Circuits.
ICCD 1994: 212-216 |
| 17 | | Jun Gu,
Qian-Ping Gu:
Average Time Complexity of the SAT 1.2 Algorithm.
ISAAC 1994: 146-154 |
| 16 | | Jun Gu:
Multispace Search: A New Optimization Approach.
ISAAC 1994: 252-260 |
| 15 | EE | Jun Gu:
Global Optimization for Satisfiability (SAT) Problem.
IEEE Trans. Knowl. Data Eng. 6(3): 361-381 (1994) |
| 14 | EE | Rok Sosic,
Jun Gu:
Efficient Local Search with Conflict Minimization: A Case Study of the n-Queens Problem.
IEEE Trans. Knowl. Data Eng. 6(5): 661-668 (1994) |
| 13 | EE | Qian-Ping Gu,
Jun Gu:
Algorithms and Average Time Bounds of Sorting on a Mesh-Connected Computer.
IEEE Trans. Parallel Distrib. Syst. 5(3): 308-315 (1994) |
| 1993 |
|---|
| 12 | | Abdel-Fattah Yousif,
Jun Gu:
An Efficient Global Search Algorithm for Test Generation.
ISCAS 1993: 1499-1502 |
| 11 | | Ruchir Puri,
Jun Gu:
Signal Transition Graph Constraints for Speed-independent Ciruit Synthesis.
ISCAS 1993: 1686-1689 |
| 10 | EE | Xiaofei Huang,
Jun Gu,
Youshou Wu:
A Constrained Approach to Multifont Chinese Character Recognition.
IEEE Trans. Pattern Anal. Mach. Intell. 15(8): 838-843 (1993) |
| 9 | EE | Ruchir Puri,
Jun Gu:
Microword length minimization in microprogrammed controller synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1449-1457 (1993) |
| 8 | EE | Ruchir Puri,
Jun Gu:
An efficient algorithm to search for minimal closed covers in sequential machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(6): 737-745 (1993) |
| 1992 |
|---|
| 7 | EE | Ruchir Puri,
Jun Gu:
An Efficient algorithm for Microword Length Minimization.
DAC 1992: 651-656 |
| 6 | | Jun Gu:
Design Efficient Local Search Algorithms.
IEA/AIE 1992: 651-654 |
| 5 | EE | Jun Gu,
Wei Wang:
A Novel Discrete Relaxation Architecture.
IEEE Trans. Pattern Anal. Mach. Intell. 14(8): 857-865 (1992) |
| 1991 |
|---|
| 4 | | Rok Sosic,
Jun Gu:
3000000 Queens in Less Than One Minute.
SIGART Bulletin 2(2): 22-24 (1991) |
| 1990 |
|---|
| 3 | | Jun Gu,
Rok Sosic:
A Parallel Optimal Arc Consistency Algorithm.
ICPP (1) 1990: 599-600 |
| 2 | | Rok Sosic,
Jun Gu:
A Polynomial Time Algorithm for the N-Queens Problem.
SIGART Bulletin 1(3): 7-11 (1990) |
| 1989 |
|---|
| 1 | | Jun Gu,
Kent F. Smith:
A Structured Approach for VLSI Circuit Design.
IEEE Computer 22(11): 9-22 (1989) |
