 | 2009 |
|---|
| 135 |       | Simon Schliecker,
Rolf Ernst:
A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems.
CODES+ISSS 2009: 433-442 |
| 134 | | Ahmed Amine Jerraya,
Rolf Ernst:
Panel session - Multicore, will Startups drive innovation?
DATE 2009: 1403 |
| 133 | | Sean Whitty,
Henning Sahlbach,
Rolf Ernst,
Wolfram Putzke-Röming:
Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architecture.
DATE 2009: 27-32 |
| 132 | | Mircea Negrean,
Simon Schliecker,
Rolf Ernst:
Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources.
DATE 2009: 524-529 |
| 131 | | Jonas Diemer,
Rolf Ernst:
A link arbitration scheme for quality of service in a latency-optimized network-on-chip.
DATE 2009: 574-577 |
| 130 | | Kai Richter,
Marek Jersak,
Rolf Ernst:
Learning early-stage platform dimensioning from late-stage timing verification.
DATE 2009: 851-857 |
| 129 | | Maurice Sebastian,
Rolf Ernst:
Reliability Analysis of Single Bus Communication with Real-Time Requirements.
PRDC 2009: 3-10 |
| 128 | | Matthias Ivers,
Rolf Ernst:
Probabilistic Network Loads with Dependencies and the Effect on Queue Sojourn Times.
QSHINE 2009: 280-296 |
| 127 | | Matthias Ivers,
Rolf Ernst:
Dependency-aware stochastic analysis of chained execution times.
SIES 2009: 70-73 |
| 126 | | Simon Schliecker,
Jonas Rox,
Mircea Negrean,
Kai Richter,
Marek Jersak,
Rolf Ernst:
System Level Performance Analysis for Real-Time Automotive Multicore and Network Architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(7): 979-992 (2009) |
| 2008 |
|---|
| 125 | | Steffen Stein,
Rolf Ernst:
Distributed Performance Control in Organic Embedded Systems.
ATC 2008: 331-342 |
| 124 | | Simon Schliecker,
Mircea Negrean,
Gabriela Nicolescu,
Pierre G. Paulin,
Rolf Ernst:
Reliable performance analysis of a multicore multithreaded system-on-chip.
CODES+ISSS 2008: 161-166 |
| 123 | | Simon Schliecker,
Jonas Rox,
Matthias Ivers,
Rolf Ernst:
Providing accurate event models for the analysis of heterogeneous multiprocessor systems.
CODES+ISSS 2008: 185-190 |
| 122 | | Rolf Ernst,
Marek Jersak,
Hans Sarnowski,
Marco Bekooij,
Samarjit Chakraborty:
Formal Methods in System and MpSoC Performance Analysis and Optimisation.
DATE 2008 |
| 121 | | Jonas Rox,
Rolf Ernst:
Modeling Event Stream Hierarchies with Hierarchical Event Models.
DATE 2008: 492-497 |
| 120 | | E. Frank,
Reinhard Wilhelm,
Rolf Ernst,
Alberto L. Sangiovanni-Vincentelli,
Marco Di Natale:
Methods, Tools and Standards for the Analysis, Evaluation and Design of Modern Automotive Architectures.
DATE 2008: 659-663 |
| 119 | | Jonas Rox,
Rolf Ernst:
Construction and Deconstruction of Hierarchical Event Streams with Multiple Hierarchical Layers.
ECRTS 2008: 201-210 |
| 118 | | Maurice Sebastian,
Rolf Ernst:
Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements.
ETFA 2008: 1465-1472 |
| 117 | | Sean Whitty,
Rolf Ernst:
A bandwidth optimized SDRAM controller for the MORPHEUS reconfigurable architecture.
IPDPS 2008: 1-8 |
| 116 | | Razvan Racu,
Arne Hamann,
Rolf Ernst:
Sensitivity analysis of complex embedded real-time systems.
Real-Time Systems 39(1-3): 31-72 (2008) |
| 2007 |
|---|
| 115 | | Razvan Racu,
Li Li,
Rafik Henia,
Arne Hamann,
Rolf Ernst:
Improved response time analysis of tasks scheduled under preemptive Round-Robin.
CODES+ISSS 2007: 179-184 |
| 114 | | Rolf Ernst,
Gernot Spiegelberg,
Thomas Weber,
Hermann Kopetz,
Alberto L. Sangiovanni-Vincentelli,
Marek Jersak:
Automotive networks: are new busses and gateways the answer or just another challenge?
CODES+ISSS 2007: 263 |
| 113 | | Simon Künzli,
Arne Hamann,
Rolf Ernst,
Lothar Thiele:
Combined approach to system level performance analysis of embedded systems.
CODES+ISSS 2007: 63-68 |
| 112 | | Razvan Racu,
Arne Hamann,
Rolf Ernst,
Kai Richter:
Automotive Software Integration.
DAC 2007: 545-550 |
| 111 | | Amilcar do Carmo Lucas,
Sven Heithecker,
Rolf Ernst:
FlexWAFE - A High-end Real-Time Stream Processing Library for FPGAs.
DAC 2007: 916-921 |
| 110 | | Simon Schliecker,
Steffen Stein,
Rolf Ernst:
Performance analysis of complex systems by integration of dataflow graphs and compositional performance analysis.
DATE 2007: 273-278 |
| 109 | | Arne Hamann,
Razvan Racu,
Rolf Ernst:
Methods for multi-dimensional robustness optimization in complex embedded systems.
EMSOFT 2007: 104-113 |
| 108 | | Simon Perathoner,
Ernesto Wandeler,
Lothar Thiele,
Arne Hamann,
Simon Schliecker,
Rafik Henia,
Razvan Racu,
Rolf Ernst,
Michael González Harbour:
Influence of different system abstractions on the performance analysis of distributed real-time systems.
EMSOFT 2007: 193-202 |
| 107 | | Arne Hamann,
Rolf Ernst:
Efficient priority optimization in complex distributed embedded systems through search space adaptation.
GECCO 2007: 1517 |
| 106 | | Arne Hamann,
Razvan Racu,
Rolf Ernst:
Multi-dimensional Robustness Optimization in Heterogeneous Distributed Embedded Systems.
IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 269-280 |
| 105 | | Razvan Racu,
Arne Hamann,
Rolf Ernst:
Automotive System Optimization using Sensitivity Analysis.
IESS 2007: 57-70 |
| 104 | | Rafik Henia,
Razvan Racu,
Rolf Ernst:
Improved Output Jitter Calculation for Compositional Performance Analysis of Distributed Systems.
IPDPS 2007: 1-8 |
| 103 | | Rafik Henia,
Rolf Ernst:
Scenario Aware Analysis for Complex Event Models and Distributed Systems.
RTSS 2007: 171-180 |
| 102 | | Jan Staschulat,
Rolf Ernst:
Scalable precision cache analysis for real-time software.
ACM Trans. Embedded Comput. Syst. 6(4): (2007) |
| 2006 |
|---|
| 101 | | Razvan Racu,
Arne Hamann,
Rolf Ernst,
Bren Mochocki,
Xiaobo Sharon Hu:
Methods for power optimization in distributed embedded systems with real-time requirements.
CASES 2006: 379-388 |
| 100 | | Simon Schliecker,
Matthias Ivers,
Rolf Ernst:
Integrated analysis of communicating tasks in MPSoCs.
CODES+ISSS 2006: 288-293 |
| 99 | | Arne Hamann,
Razvan Racu,
Rolf Ernst:
A formal approach to robustness maximization of complex heterogeneous embedded systems.
CODES+ISSS 2006: 40-45 |
| 98 | | Amilcar do Carmo Lucas,
Sven Heithecker,
Peter Rüffer,
Rolf Ernst,
Holger Rückert,
Gerhard Wischermann,
Karin Gebel,
Reinhard Fach,
Wolfgang Huther,
Stefan Eichner,
Gunter Scheller:
A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications.
DATE 2006: 194-199 |
| 97 | | Rafik Henia,
Rolf Ernst:
Improved offset-analysis using multiple timing-references.
DATE 2006: 450-455 |
| 96 | | Kai Richter,
Rolf Ernst:
How OEMs and suppliers can face the network integration challenges.
DATE Designers' Forum 2006: 183-188 |
| 95 | | Sven Heithecker,
Amilcar do Carmo Lucas,
Rolf Ernst:
FlexFilm - an Image Processor for Digital Film Processing.
Dynamically Reconfigurable Architectures 2006 |
| 94 | | Jan Staschulat,
Rolf Ernst:
Worst case timing analysis of input dependent data cache behavior.
ECRTS 2006: 227-236 |
| 93 | | Razvan Racu,
Arne Hamann,
Rolf Ernst:
A Formal Approach to Multi-Dimensional Sensitivity Analysis of Embedded Real-Time Systems.
ECRTS 2006: 3-12 |
| 92 |  | Steffen Stein,
Arne Hamann,
Rolf Ernst:
Real-time Management in Emergent Systems.
GI Jahrestagung (1) 2006: 104-111 |
| 91 | | Razvan Racu,
Rolf Ernst:
Scheduling Anomaly Detection and Optimization for Distributed Systems with Preemptive Task-Sets.
IEEE Real Time Technology and Applications Symposium 2006: 325-334 |
| 90 | | Wael Adi,
Rolf Ernst,
Bassel Soudan,
Abdulrahman Hanoun:
VLSI Design Exchange with Intellectual Property Protection in FPGA Environment Using both Secret and Public-Key Cryptography.
ISVLSI 2006: 24-32 |
| 89 | | Steffen Stein,
Arne Hamann,
Rolf Ernst:
Real-Time Property Verification in Organic Computing Systems.
ISoLA 2006: 192-197 |
| 88 | | Jan Staschulat,
Jörn-Christian Braam,
Rolf Ernst,
Thomas Rambow,
Rainer Schlör,
Rainer Busch:
Cost-Efficient Worst-Case Execution Time Analysis in Industrial Practice.
ISoLA 2006: 204-211 |
| 87 | | Simon Schliecker,
Matthias Ivers,
Jan Staschulat,
Rolf Ernst:
A Framework for the Busy Time Calculation of Multiple Correlated Events.
WCET 2006 |
| 86 | | Arne Hamann,
Marek Jersak,
Kai Richter,
Rolf Ernst:
A framework for modular analysis and exploration of heterogeneous embedded systems.
Real-Time Systems 33(1-3): 101-137 (2006) |
| 2005 |
|---|
| 85 | | Amilcar do Carmo Lucas,
Rolf Ernst:
An Image Processor for Digital Film.
ASAP 2005: 219-224 |
| 84 | | Sven Heithecker,
Rolf Ernst:
Traffic shaping for an FPGA based SDRAM controller with complex QoS requirements.
DAC 2005: 575-578 |
| 83 | | Jan Staschulat,
Rolf Ernst,
Andreas Schulze,
Fabian Wolf:
Context Sensitive Performance Analysis of Automotive Applications.
DATE 2005: 165-170 |
| 82 | | Arne Hamann,
Rolf Ernst:
TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques.
DATE 2005: 312-317 |
| 81 | | Rafik Henia,
Rolf Ernst:
Context-Aware Scheduling Analysis of Distributed Systems with Tree-Shaped Task-Dependencies.
DATE 2005: 480-485 |
| 80 | | Judita Kruse,
Clive Thomsen,
Rolf Ernst,
Thomas Volling,
Thomas Spengler:
Introducing Flexible Quantity Contracts into Distributed SoC and Embedded System Design Processes.
DATE 2005: 938-943 |
| 79 | | Jan Staschulat,
Simon Schliecker,
Rolf Ernst:
Scheduling Analysis of Real-Time Systems with Precise Modeling of Cache Related Preemption Delay.
ECRTS 2005: 41-48 |
| 78 | | Sven Heithecker,
Rolf Ernst:
An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping (abstract only).
FPGA 2005: 277 |
| 77 | | Christian Haubelt,
Marek Jersak,
Kai Richter,
Karsten Strehl,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich,
Lothar Thiele:
SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme.
GI Jahrestagung (2) 2005: 693-697 |
| 76 | | Bren Mochocki,
Razvan Racu,
Rolf Ernst:
Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems.
ICCAD 2005: 446-449 |
| 75 | | Razvan Racu,
Marek Jersak,
Rolf Ernst:
Applying Sensitivity Analysis in Real-Time Distributed Systems.
IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 160-169 |
| 74 | | Jan Staschulat,
Rolf Ernst:
Scalable precision cache analysis for preemptive scheduling.
LCTES 2005: 157-165 |
| 73 | | Jan Staschulat,
Simon Schliecker,
Matthias Ivers,
Rolf Ernst:
Analysis of Memory Latencies in Multi-Processor Systems.
WCET 2005 |
| 72 | | Marek Jersak,
Kai Richter,
Rolf Ernst:
Performance analysis for complex embedded applications.
IJES 1(1/2): 33-49 (2005) |
| 2004 |
|---|
| 71 | | Marek Jersak,
Rafik Henia,
Rolf Ernst:
Context-Aware Performance Analysis for Efficient Embedded System Design.
DATE 2004: 1046-1051 |
| 70 | | Jan Staschulat,
Rolf Ernst:
Multiple process execution in cache related preemption delay analysis.
EMSOFT 2004: 278-286 |
| 69 | | Arne Hamann,
Marek Jersak,
Kai Richter,
Rolf Ernst:
Design Space Exploration and System Optimization with SymTA/S-- Symbolic Timing Analysis for Systems.
RTSS 2004: 469-478 |
| 68 | | Marek Jersak,
Kai Richter,
Rolf Ernst:
Interval-based analysis in embedded system design.
Mathematics and Computers in Simulation 66(2-3): 231-242 (2004) |
| 2003 |
|---|
| 67 | | Reinaldo A. Bergamaschi,
Grant Martin,
Wayne Wolf,
Rolf Ernst,
Kees A. Vissers,
Jack Kouloheris:
The future of system-level design: can we find the right solutions to the right problems at the right time?
CODES+ISSS 2003: 231 |
| 66 | | Marek Jersak,
Rolf Ernst:
Enabling scheduling analysis of heterogeneous systems with multi-rate data dependencies and rate intervals.
DAC 2003: 454-459 |
| 65 | | Ken Tindell,
Hermann Kopetz,
Fabian Wolf,
Rolf Ernst:
Safe Automotive Software Development.
DATE 2003: 10616-10623 |
| 64 | | Marek Jersak,
Kai Richter,
Rolf Ernst,
Jörn-Christian Braam,
Zheng-Yu Jiang,
Fabian Wolf:
Formal Methods for Integration of Automotive Software.
DATE 2003: 20045-20050 |
| 63 | | Kai Richter,
Razvan Racu,
Rolf Ernst:
Scheduling Analysis Integration for Heterogeneous Multiprocessor SoC.
RTSS 2003: 236-245 |
| 62 | | Rolf Ernst:
Putting It All Together.
ACM Queue 1(2): (2003) |
| 61 | | Kai Richter,
Marek Jersak,
Rolf Ernst:
A Formal Approach to MpSoC Performance Verification.
IEEE Computer 36(4): 60-67 (2003) |
| 2002 |
|---|
| 60 | | Marek Jersak,
Kai Richter,
Rafik Henia,
Rolf Ernst,
Frank Slomka:
Transformation of SDL specifications for system-level timing analysis.
CODES 2002: 121-126 |
| 59 | | Kai Richter,
Dirk Ziegenbein,
Marek Jersak,
Rolf Ernst:
Model composition for scheduling analysis in platform design.
DAC 2002: 287-292 |
| 58 | | Fabian Wolf,
Jan Staschulat,
Rolf Ernst:
Associative caches in formal software timing analysis.
DAC 2002: 622-627 |
| 57 | | Kai Richter,
Rolf Ernst:
Event Model Interfaces for Heterogeneous System Analysis.
DATE 2002: 506-513 |
| 56 | | Christian Haubelt,
Jürgen Teich,
Kai Richter,
Rolf Ernst:
System Design for Flexibility.
DATE 2002: 854-861 |
| 55 | | Kai Richter,
Dirk Ziegenbein,
Marek Jersak,
Rolf Ernst:
Bottom-Up Performance Analysis of HW/SW Platforms.
DIPES 2002: 173-183 |
| 54 | | Christian Haubelt,
Jürgen Teich,
Kai Richter,
Rolf Ernst:
Flexibility/Cost-Tradeoffs of Platform-Based Systems.
Embedded Processor Design Challenges 2002: 38-56 |
| 53 | | Dirk Ziegenbein,
Kai Richter,
Rolf Ernst,
Lothar Thiele,
Jürgen Teich:
SPI - a system model for heterogeneously specified embedded systems.
IEEE Trans. VLSI Syst. 10(4): 379-389 (2002) |
| 2001 |
|---|
| 52 | | Rolf Ernst:
Combining Languages in Embedded System Design.
DSD 2001: 62- |
| 51 | | Dirk Ziegenbein,
Fabian Wolf,
Kai Richter,
Marek Jersak,
Rolf Ernst:
Interval-Based Analysis of Software Processes.
LCTES/OM 2001: 94-101 |
| 50 | | Jörg Henkel,
Rolf Ernst:
An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques.
IEEE Trans. VLSI Syst. 9(2): 273-289 (2001) |
| 49 | | Karsten Strehl,
Lothar Thiele,
Matthias Gries,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
FunState-an internal design representation for codesign.
IEEE Trans. VLSI Syst. 9(4): 524-544 (2001) |
| 48 | | Fabian Wolf,
Rolf Ernst,
Wei Ye:
Path clustering in software timing analysis.
IEEE Trans. VLSI Syst. 9(6): 773-782 (2001) |
| 47 | | Fabian Wolf,
Rolf Ernst:
Execution cost interval refinement in static software analysis.
Journal of Systems Architecture 47(3-4): 339-356 (2001) |
| 2000 |
|---|
| 46 | | Rolf Ernst,
Ahmed Amine Jerraya:
embedded system design with multiple languages: embedded tutorial.
ASP-DAC 2000: 391-396 |
| 45 | | Rolf Ernst,
Grant Martin,
Oz Levia,
Pierre G. Paulin,
Stamatis Vassiliadis,
Kees A. Vissers:
The Future of Flexible HW Platform Architectures Panel Discussion.
DATE 2000: 634- |
| 44 | | K. Henriss,
Peter Rüffer,
Rolf Ernst,
S. Hasenzahl:
A Reconfigurable Hardware Platform for Digital Real-Time Signal Processing in Television Studios.
FCCM 2000: 285-286 |
| 43 | | Fabian Wolf,
Rolf Ernst:
Intervals in Software Execution Cost Analysis.
ISSS 2000: 130-136 |
| 42 | | Marek Jersak,
Ying Cai,
Dirk Ziegenbein,
Rolf Ernst:
A Transformational Approach to Constraint Relaxation of a Time-driven Simulation Model.
ISSS 2000: 137-142 |
| 41 | | Rolf Ernst:
Das DFG-Schwerpunktprogramm 1020 (Research Priority Program 1020 of the German "Deutsche Forschungsgemeinschaft").
it+ti - Informationstechnik und Technische Informatik 42(2): 16-19 (2000) |
| 40 | | Rolf Ernst:
Rapid Prototyping von integrierten Steuerungssystemen.
it+ti - Informationstechnik und Technische Informatik 42(2): 5-7 (2000) |
| 1999 |
|---|
| 39 | | Stefan Stille,
Rolf Ernst:
Using Adaptive Layout Calculation to Handle the Visual Chaos in GUIs.
CADUI 1999: 185-198 |
| 38 | | Karsten Strehl,
Lothar Thiele,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
Scheduling hardware/software systems using symbolic techniques.
CODES 1999: 173-177 |
| 37 | | Kai Richter,
Dirk Ziegenbein,
Rolf Ernst,
Lothar Thiele,
Jürgen Teich:
Representation of Function Variants for Embedded System Optimization and Synthesis.
DAC 1999: 517-522 |
| 36 | | Ahmed Amine Jerraya,
Rolf Ernst:
Multi-Language System Design.
DATE 1999: 696- |
| 35 | | Rolf Ernst,
Kees A. Vissers,
Pieter van der Wolf,
Gert-Jan van Rootselaar:
System level design and debug of high-performance embedded media systems (tutorial).
ICCAD 1999: 461 |
| 34 | | Dirk Herrmann,
Rolf Ernst:
Improved interconnect sharing by identity operation insertion.
ICCAD 1999: 489-493 |
| 33 | | Lothar Thiele,
Karsten Strehl,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
FunState - an internal design representation for codesign.
ICCAD 1999: 558-565 |
| 32 | | Achim Österling,
Rolf Ernst:
Process Versions in Rapid Prototyping.
IEEE International Workshop on Rapid System Prototyping 1999: 94-99 |
| 1998 |
|---|
| 31 | | Jörg Henkel,
Rolf Ernst:
High-Level Estimation Techniques for Usage in Hardware/Software Co-Design.
ASP-DAC 1998: 353-360 |
| 30 | | Dirk Ziegenbein,
Rolf Ernst,
Kai Richter,
Jürgen Teich,
Lothar Thiele:
Combining multiple models of computation for scheduling and allocation.
CODES 1998: 9-13 |
| 29 | | Dirk Ziegenbein,
Kai Richter,
Rolf Ernst,
Jürgen Teich,
Lothar Thiele:
Representation of process mode correlation for scheduling.
ICCAD 1998: 54-61 |
| 28 | | Rolf Ernst:
Codesign of Embedded Systems: Status and Trends.
IEEE Design & Test of Computers 15(2): 45-54 (1998) |
| 1997 |
|---|
| 27 | | Reinhard Gerndt,
Rolf Ernst:
An Event-Driven Multi-Threading Architecture for Embedded Systems.
CODES 1997: 29-34 |
| 26 | | Thomas Benner,
Rolf Ernst:
An Approach to Mixed Systems Co-Synthesis.
CODES 1997: 9-14 |
| 25 | | Jörg Henkel,
Rolf Ernst:
A Hardware/Software Partitioner Using a Dynamically Determined Granularity.
DAC 1997: 691-696 |
| 24 | | Dirk Herrmann,
Rolf Ernst:
Register synthesis for speculative computation.
ED&TC 1997: 463-467 |
| 23 | | Rolf Ernst:
Rapid Prototyping für integrierte Steuerungssysteme mit harten Zeitbedingungen.
GI Jahrestagung 1997: 121-122 |
| 22 | | Rolf Ernst,
Wei Ye:
Embedded program timing analysis based on path clustering and architecture classification.
ICCAD 1997: 598-604 |
| 21 | | Stefan Stille,
Shailey Minocha,
Rolf Ernst:
An Adaptive Window Management System.
INTERACT 1997: 67-68 |
| 1996 |
|---|
| 20 | | Jörg Henkel,
Rolf Ernst:
The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning.
CODES 1996: 52-61 |
| 1995 |
|---|
| 19 | | Thomas Benner,
Rolf Ernst,
Achim Österling:
Scalable performance scheduling for hardware-software cosynthesis.
EURO-DAC 1995: 164-169 |
| 18 | | Peter Lüders,
Rolf Ernst:
Research report: improving browsing in information by the automatic display layout.
INFOVIS 1995: 26-35 |
| 17 | | Jörg Henkel,
Rolf Ernst:
A path-based technique for estimating hardware runtime in HW/SW-cosynthesis.
ISSS 1995: 116-121 |
| 16 | | Peter Lüders,
Rolf Ernst:
Das Automatisierte Bildschirmlayout.
Inform., Forsch. Entwickl. 10(1): 1-13 (1995) |
| 15 | | Peter Lüders,
Rolf Ernst,
Stefan Stille:
An Approach to Automatic Display Layout Using Combinatorial Optimization Algorithms.
Softw., Pract. Exper. 25(11): 1183-1202 (1995) |
| 1994 |
|---|
| 14 | | Dirk Herrmann,
Jörg Henkel,
Rolf Ernst:
An approach to the adaptation of estimated cost parameters in the COSYMA system.
CODES 1994: 100-107 |
| 13 | | Thomas Benner,
Rolf Ernst,
Ingo Könenkamp,
Ulrich Holtmann,
P. Schüler,
H.-C. Schaub,
N. Serafimov:
FPGA Based Prototyping for Verification and Evaluation in Hardware-Software Cosynthesis.
FPL 1994: 251-258 |
| 12 | | Jörg Henkel,
Rolf Ernst,
Ulrich Holtmann,
Thomas Benner:
Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis.
ICCAD 1994: 96-100 |
| 11 | | Peter Lüders,
Rolf Ernst:
The Dynamic Screen - Beyond the Limits of Traditional Graphic User Interfaces.
IFIP Congress (1) 1994: 109-114 |
| 1993 |
|---|
| 10 | | Ulrich Holtmann,
Rolf Ernst:
Speculative Computation for Coprocessor Synthesis.
ICCD 1993: 126-131 |
| 9 | | W. Ye,
Rolf Ernst,
Thomas Benner,
Jörg Henkel:
Fast Timing Analysis for Hardware-Software Co-Synthesis.
ICCD 1993: 452-457 |
| 8 | | Peter Lüders,
Rolf Ernst:
Automatic Display Layout in Window Oriented User Interfaces.
Interfaces in Industrial Systems for Production Engineering 1993: 27-41 |
| 7 | | Rolf Ernst,
Jörg Henkel,
Thomas Benner:
Hardware-Software Cosynthesis for Microcontrollers.
IEEE Design & Test of Computers 10(4): 64-75 (1993) |
| 6 | | Ulrich Holtmann,
Rolf Ernst:
Experiments with low-level speculative computation based on multiple branch prediction.
IEEE Trans. VLSI Syst. 1(3): 262-267 (1993) |
| 1992 |
|---|
| 5 | | Peter Lüders,
Rolf Ernst:
Verbesserung der Benutzeroberfläche von CAD-Systemen durch automatisches Bildschirmlayout.
Rechnerunterstütztes Entwerfen und Konstruieren (CAD) 1992: 77-92 |
| 1991 |
|---|
| 4 | | Rolf Ernst,
P. Nowottnick:
Fault Tolerant VLSI Design with Functional Block Redundancy.
ICCD 1991: 432-436 |
| 3 | | Rolf Ernst,
Jayaram Bhasker:
Simulation-Based Verification for High-Level Synthesis.
IEEE Design & Test of Computers 8(1): 14-20 (1991) |
| 1990 |
|---|
| 2 | | Rolf Ernst,
S. Sutarwala,
J.-Y. Jou,
M. Tong:
Simulation based verification of register-transfer level behavioral synthesis tools.
EURO-DAC 1990: 396-400 |
| 1989 |
|---|
| 1 | | Rolf Ernst,
S. Sutarwala,
J.-Y. Jou:
TSG: A Test System Generator for Debugging and Regression Test of High-Level Behavioral Synthesis Tools.
ITC 1989: 937 |
