| 2008 |
|---|
| 7 | EE | Shashi Kiran Chilappagari,
Dung Viet Nguyen,
Bane V. Vasic,
Michael W. Marcellin:
On the guaranteed error correction capability of LDPC codes
CoRR abs/0801.1276: (2008) |
| 6 | EE | Shashi Kiran Chilappagari,
Anantha Raman Krishnan,
Bane V. Vasic:
LDPC Codes Which Can Correct Three Errors Under Iterative Decoding
CoRR abs/0801.1282: (2008) |
| 5 | EE | Milos Ivkovic,
Shashi Kiran Chilappagari,
Bane V. Vasic:
Eliminating Trapping Sets in Low-Density Parity Check Codes by using Tanner Graph Covers
CoRR abs/0805.1662: (2008) |
| 4 | EE | Shashi Kiran Chilappagari,
Dung Viet Nguyen,
Bane V. Vasic,
Michael W. Marcellin:
On Trapping Sets and Guaranteed Error Correction Capability of LDPC Codes and GLDPC Codes
CoRR abs/0805.2427: (2008) |
| 2007 |
|---|
| 3 | EE | Shashi Kiran Chilappagari,
Bane V. Vasic:
Reliable Memories Built from Unreliable Components Based on Expander Graphs
CoRR abs/0705.0044: (2007) |
| 2 | EE | Shashi Kiran Chilappagari,
Bane V. Vasic:
Error Correction Capability of Column-Weight-Three LDPC Codes
CoRR abs/0710.3427: (2007) |
| 2006 |
|---|
| 1 | EE | Milos Ivkovic,
Shashi Kiran Chilappagari,
Bane V. Vasic:
Construction of Memory Circuits Using Unreliable Components Based on Low-Density Parity-Check Codes.
GLOBECOM 2006 |
